FIELD OF THE INVENTION
The invention relates to the field of semiconductors, specifically, VMOS semiconductors.
VMOS semiconductors are known in the prior art. Examples are shown in U.S. Pat. Nos. 3,975,221 and 3,924,265.
Prior art patents also include 3,761,785 showing separate gate electrodes in a MESA structure field effect transistor and U.S. Pat. No. 3,893,155 showing the formation of complimentary MIS field effect transistors using the sides of the V groove.
Other examples of grooved MOS field effect transistors are shown in U.S. Pat. Nos. 3,412,297; 3,518,509; 3,775,693; 3,975,752; 3,995,172 and 4,003,126.
One of the disadvantages of a VMOS is that all must share a common terminal, either as source or a drain within the substrate. This is clearly shown in U.S. Pat. No. 3,975,221, FIG. 6 where two V groove MOS devices are shown formed with common source. As shown in the prior art patent, all the VMOS devices must share a common terminal within substrate 14.